The co-encapsulation of the optical engine with the switching ASIC may be an alternative to pluggable optical transceivers in large data centers. Pluggable connections were first introduced into enterprise networks two decades ago; now, it has become a ubiquitous solution for optical connectivity in a variety of network applications. Over the past decade, more than 1 billion pluggable transceivers have been shipped, more than 500 million of them for the FTTH or FTTx markets, and more than 10 million for connections within large data centers operated by companies. At present, in order to reduce the power consumption of the next generation Ethernet switches, the industry began to look for pluggable alternatives.
Facebook and Microsoft recently formed a collaborative group called Co-Packaged Optics (CPO). The CPO group's goal is to "provide guidance to suppliers in the design and manufacture of co-packaged optical devices using common design elements." Leading switching ASIC vendors are also investing in the development of these new solutions. There will be many technical challenges to achieve this goal, but if all goes well, demand for pluggable transceivers from the top five cloud computing companies will begin to decline by 2027-2028.
The prediction was made for a study commissioned by the ARPA-E ENLITENED project. The project is funding the development of the next generation of optical connection and switching technology, with the goal of reducing the power consumption of data center switches by a tenth.
IBM is one of the few companies to receive the second phase of ARPA-E funding this year. IBM was the first company to co-package an optical engine with an exchange ASIC as part of a DARPA funded supercomputer program from 2004 to 2008. Currently, IBM is developing low-power co-packaged optical devices based on the VCSEL array for the ENLITENED project, including the dual-wavelength VCSEL for phase ii of the program. Other teams funded by ARPA-E plan to use silicon photonics.
CPO wants to eliminate the power consumption of driving a few inches of copper wire connected to a PCB central switching ASIC and plugged into a PCB edge or panel optical transceiver. Co-packaged USES a simpler SerDes interface that not only consumes less power but also reduces latency.
The development of new technologies for optical chips must overcome many engineering challenges. LC's projections are based on the assumption that all of these challenges can be met before the early demand for these products emerges in 2023-2024, but achieving this goal still depends on the efforts of engineers.
